The TDA1543 is a fairly old, but cheap, Philips 16-bit DAC. It seems quite popular with non-oversampling (NOS) people. It produces a current output, which then has to be converted into a signal voltage by an I/V converter. The data sheet shows that this can be done by using an inverting op-amp biased from Vref, so the DAC output connects directly with an AC virtual earth.
Some audio purists prefer to avoid op-amps at the replay end, even though they were probably widely used at the recording end. It must be admitted that the op-amp immediately after a DAC has a much harder job to do than an op-amp in a studio mixing desk. The virtual earth is therefore replaced with a simple resistor to earth. Then they find that the value of this resistor, and the associated bias current resistor, is very critical. The reason for this is quite simple: the TD1543 was not designed to feed into a resistor. Most people seem to manually tweak the resistors until it sounds right. Others use fixed values, some of which are clearly wrong! Many people have found that the chip works better at higher supply voltages. All of these results are easily explained.
The signal output of the chip is a current sink, which varies from zero to 2.3mA. There is also a current source, to bias the output, which can be programmed up to 5mA. The bias current is twice the current drawn from the Vref pin. The output voltage must be somewhere between 1.8V and Vdd-1.2V. There is also a limit of 25mV on the AC signal voltage, but this is significantly violated by all passive I/V designs. The main result of ignoring the AC limit is a little 2nd-order distortion, which is relatively harmless and may be preferred by some people. The TDA1543 is unusual in this respect, which is why it is often the one used with passive I/V; many other DACs would generate very high distortion under these conditions.
Putting these constraints (not the AC one) together in a spreadsheet, I found the results shown in the plots on the right. The valid area of operation is below the red line and above the green line, and is hatched in bluish-grey. Operation at 5V is not possible with a passive I/V to earth. As the supply voltage rises the available area increases but always remains quite narrow. The chip has manufacturing tolerances of 5-10% on most parameters, so the lines should be treated as fuzzy. This is why some people are able to operate outside these limits, but they may have a design which will require chip selection if they are to avoid peak limiting. The table below gives resistor values. The values for maximum Rref and Rout were read from the plots, because I was too lazy to solve the simultaneous linear equations, so are only approximate.
|Supply||Min Rref, Rout range||Max Rref, Rout value|
|6V||920, 750-920||1.0k, 1.0k|
|7V||920, 750-1.1k||1.1k, 1.4k|
|8V||920, 750-1.3k||1.25k, 1.75k|
|8.5V||920, 750-1.4k||1.33k, 2.0k|
It looks like to use a TDA1543 with passive I/V without adjustment one should use 1k for both resistors. If DAC chips are paralleled then the common resistor values should be divided by the number of chips. If you look at published circuits you will see that most use quite high values and as a result have quite a fine adjustment of bias current to steer a path between peak clipping on opposite sides. This shows up as 2nd (and higher) harmonic distortion on a spectrum analyser. The bias current adjustment is often, wrongly, described as a Vref adjustment; I guess this is because the bias current is set by drawing current from the Vref pin.
I have seen various comments on the AC output voltage limit. The 25mV limit in the data sheet cannot be met by a resistor to ground. Some have suggested a 480mV limit; another (a DAC kit supplier) had 1.6V rms with 0.3% THD. If people really must have passive I/V then the best option is to use a potential divider which will set a standing DC bias at the output, but very few designs do this. I suspect that not enough 'designers' have actually read and understood the data sheet!
There is a graph in the data sheet giving THD at various signal levels. At full output 1kHz this gives a typical figure of 0.015%. If we assume that this is all due to output second-order non-linearity, and was measured at 25mV out peak, then at 1.6V rms we would get 1.35% THD. So much of the distortion at low AC voltage outputs is not caused by output voltage linearity, but other effects such as DAC ladder errors. This suggests that a modest violation of the 25mV limit will not be too harmful. However, passive I/V referenced to earth necessarily gives a major violation of this limit. Is it possible that some of the popularity of this DAC with passive output is due to the second-harmonic distortion it produces? People who will tolerate significant peak clipping due to wrong I/V resistor values are unlikely to complain about a little 2nd harmonic!
Can we estimate the likely error, or work backwards? I assumed that the 16 current generators each had an output impedance which was not infinite (like a perfect current source) but had a high impedance which was inversely proportional to the current. This corresponds to the model of a current generator which sees it as a fixed high voltage Vswith a high resistance in series. The result is that the output voltage looks like:
This is about the simplest possible error in a current source, yet it gives rise to an infinite number of products! Using the figures above (0.3% at 1.6V rms) gives Vs = 770V. This is quite good for a 5-8v supply. At full output it corresponds to a source resistance of 335k.
Some people use a transformer output, but I hope they still satisfy the DC conditions otherwise their expensive DAC may remain silent! You cannot simply connect the transformer primary to ground. There needs to be a DC resistance as calculated above for Rout. The transfomer can either be in series with this (with the resistor bypassed) or in parallel (with a DC blocking capacitor). In either case the aim should be to reduce the AC impedance seen at the output.
I have bought a cheap NOS passive I/V DAC board which uses four parallel TDA1543s. This comes from a supplier in Hong Kong. It includes an asynchronous local clock, but I have not used that as I am not convinced that asynchronous re-clocking has any benefits - why would you want to deliberately drop or double dozens of samples every second?
The circuit is fairly straightfoward: standard CS8414 SPDIF receiver (mounted on carrier so it plugs into an 8412 DIL socket) feeding parallel TDA1543, then passive output with DC isolation. It has two inputs: 75ohm BNC, and optical Toslink. The supply uses three LM317, for receiver, DAC and crystal oscillator respectively. It needs two separate 9V AC supplies. It came in a random box, packed with scrumpled newspaper for padding, and just a circuit diagram. The diagram is generally OK, although some of the text is in Chinese and a few component values are wrong. The board itself is double-sided, includes component names, and seems to be reasonably well made. There are two adjustments: DAC supply (set to 8V) and DAC bias current.
I hooked it up to my CD player (RCD-06) and amplifier (modified 5-20) via a volume pot. It seems to work OK. Using a Hi-Fi News test CD (with the garage door track!) and an oscilloscope I adjusted the DAC bias as it was showing signs of limiting on positive peaks. I also checked it via an optical connection from my Freeview TV box - OK (at 48kHz?). The output is lower than my CD player. It uses 220R for I/V so I estimate about 1V peak, rather than the standard 2V rms. Incidentally, the SPDIF signal from the RCD-06 was very clean with a good open eye pattern. There was a 10% overshoot and some ringing after the signal transition but this should be harmless. Rotel have done a good job on the SPDIF driver.
Later I dropped the DAC supply to about 7.5V, then readjusted the bias to give minimum second harmonic according to my Pico ADC-212. With 0dB sine wave at 1001Hz this gave -58dB (0.13%) 2nd and similar amounts of other harmonics. Dropping to -20dB gave even harmonics around -76dB (0.016%) and odd harmonics at -63dB (0.07%). There were some spurious outputs visible on the spectrum at about -40dB around 4-5kHz, but I don't know if these are genuine signals or artifacts from the ADC-212 sampling. The high levels of 44.1kHz in the signal might be confusing it. Given that the DAC is being used well outside its datasheet envelope these figures are quite good. The DC quiescent output was about 2.5V, and this did not seem to change with signal. This is because the 8414 outputs binary zero if it has no valid signal, and the I2 bus uses 2's-complement data format, so the DAC sits at half FSD output current when there is no input. I need to re-check all this, as I might have adjusted it so that negative peak clipping generates just enough 2nd to partially cancel the non-linearity produced by exceeding the output AC compliance.
My eventual aim, once I understand things a little better, is to replace the passive I/V with an active load - probably a grounded-grid triode.
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updated 22 Aug 2018: modified for new website